A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory
Author:
Affiliation:
1. Nanyang Technological University,Centre for Integrated Circuits and Systems,Singapore
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937509.pdf?arnumber=9937509
Reference14 articles.
1. A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing
2. Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision
3. Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator Using In-Situ Processing-In-SRAM;al-hawaj;IEEE ISCAS,2021
4. Design of Approximate Restoring Dividers
5. Design of a power-efficient CAM using automated background checking scheme for small match line swing
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