A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing-Reference-Cited by-同舟云学术

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A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing

Published:2020-01 Issue:1 Volume:55 Page:76-86
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Wang Jingcheng^ORCID,Wang Xiaowei^ORCID,Eckert Charles^ORCID,Subramaniyan Arun^ORCID,Das Reetuparna,Blaauw David^ORCID,Sylvester Dennis^ORCID

Funder

Semiconductor Research Corporation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/8944135/08846572.pdf?arnumber=8846572

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