Evaluation of Dual Mode Logic Under Cryogenic Temperatures
Author:
Affiliation:
1. Bar-Ilan University,Ramat Gan,Israel
2. EPFL University,Lausanne,Switzerland
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937556.pdf?arnumber=9937556
Reference15 articles.
1. A cryogenic interface for controlling many qubits;pauka,2019
2. Characterization and Modeling of Mismatch in Cryo-CMOS
3. Towards an Improved Model for 65-nm CMOS at Cryogenic Temperatures
4. A Cryo-CMOS Digital Cell Library for Quantum Computing Applications
5. CMOS-based cryogenic control of silicon quantum circuits
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1. Overview of Cryogenic Operation in Nanoscale Technology Nodes;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27
2. Revisiting Dynamic Logic—A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies;IEEE Transactions on Circuits and Systems I: Regular Papers;2023
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