Overview of Cryogenic Operation in Nanoscale Technology Nodes
Author:
Affiliation:
1. Bar-Ilan University,EnISC Labs, Faculty of Engineering,Ramat-Gan,Israel
2. AQUA, School of Engineering, Ecole Polytechnique Fédérale de Lausanne,Lausanne,Switzerland
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10108078/10108098/10108221.pdf?arnumber=10108221
Reference26 articles.
1. Physics and performance of nanoscale semiconductor devices at cryogenic temperatures
2. Semiconductors at cryogenic temperatures
3. Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures
4. Physical Model of Low-Temperature to Cryogenic Threshold Voltage in MOSFETs
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4. Revisiting Dynamic Logic—A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies;IEEE Transactions on Circuits and Systems I: Regular Papers;2023
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