A 75dB-SNDR 10MHz-BW 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by an On-Chip DC-DC Converter-Reference-Cited by-同舟云学术

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A 75dB-SNDR 10MHz-BW 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by an On-Chip DC-DC Converter

Published:2024-04-21 Issue: Volume: Page:1-2
ISSN:
Container-title:2024 IEEE Custom Integrated Circuits Conference (CICC)
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Author:

Gong Haoyu¹,Zeng Wen-Liang¹,Guo Mingqiang¹,Lam Chi-Seng¹,Zhao Shulin¹,Martins Rui Paulo¹,Sin Sai-Weng¹

Affiliation:

1. University of Macau

Funder

The Science and Technology Development Fund, Macao S.A.R

University of Macau

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10528947/10528954/10529054.pdf?arnumber=10529054

Reference6 articles.

1. A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique

2. 60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration

3. 20.3 A 50MHz-Bandwidth 70.4dB-SNDR Calibration-Free Time-Interleaved 4th-Order Noise-Shaping SAR ADC;Jie;ISSCC,2019

4. 27.5 An 80MHz-BW 640MS/s Time-Interleaved Passive Noise-Shaping SAR ADC in 22nm FDSOI Process

5. 20.2 A 40MHz-BW 320MS/s Passive Noise-Shaping SAR ADC With Passive Signal-Residue Summation in 14nm FinFET

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