RADPlace-MS: A Timing-Driven Placer and Optimiser for ASICs Radiation Hardening-Reference-Cited by-同舟云学术

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RADPlace-MS: A Timing-Driven Placer and Optimiser for ASICs Radiation Hardening

Published:2022-10-19 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
language:
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Author:

Georgakidis Christos¹,Simoglou Stavros¹,Sotiriou Christos¹

Affiliation:

1. University of Thessaly,Department of Electrical and Computer Engineering,Volos,Greece

Funder

University of Thessaly

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9962319/9962334/09962347.pdf?arnumber=9962347

Reference15 articles.

1. Design Flow for Radhard TMR Flip-Flops

2. R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints

3. Radiation Hardening Legalisation Satisfying TMR Spacing Constraints with Respect to HPWL;georgakidis;2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),2020

4. RADPlace: A Timing-aware RAdiation-Hardening Detailed Placement Scheme Satisfying TMR Spacing Constraints

5. Graph-based STA for asynchronous controllers

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