Preventing Soft Errors and Hardware Trojans in RISC-V Cores-Reference-Cited by-同舟云学术

Preventing Soft Errors and Hardware Trojans in RISC-V Cores

Published:2022-10-19 Issue: Volume: Page:
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Container-title:2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
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Author:

Annink Edian B.¹,Rauwerda Gerard²,Hakkennes Edwin²,Menicucci Alessandra³,Mascio Stefano Di³,Furano Gianluca⁴,Ottavi Marco¹

Affiliation:

1. University of Twente,Enschede,the Netherlands

2. Technolution B.V.,Gouda,the Netherlands

3. Delft University of Technology,Delft,the Netherlands

4. European Space Agency, European Space Research and Technology Centre,Noordwijk,the Netherlands

Publisher

IEEE

Link

Reference31 articles.

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