Ultrathin Strained-SOI by Stress Balance on Compliant Substrates and FET Performance-Reference-Cited by-同舟云学术

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Ultrathin Strained-SOI by Stress Balance on Compliant Substrates and FET Performance

Published:2005-10 Issue:10 Volume:52 Page:2207-2214
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:en
Short-container-title:IEEE Trans. Electron Devices

Author:

Yin H.,Hobart K.D.,Peterson R.L.,Kub F.J.,Sturm J.C.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/16/32353/01510910.pdf?arnumber=1510910

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Hetero-Material Gate Doping-Less Tunnel FET and Its Misalignment Effects on Analog/RF Parameters;Journal of Electronic Materials;2018-03-06

2. Raman spectroscopy of ultrathin strained-silicon-on-insulator: Size effects in strain, elastic, and phonon properties;Applied Physics Letters;2015-03-02

3. Research on the capacitance-voltage characteristic of strained-silicon NMOS accumulation capacitor;Acta Physica Sinica;2013

4. Study on gate capacitance-voltage characteristics of strained-SiGe pMOSFET;Acta Physica Sinica;2013

5. Analytical Threshold Voltage Models for Strained Si/Strained Si_1-xGe_x/Relaxd Si_1-yGe_y PMOSFET;Applied Mechanics and Materials;2011-10-24

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