A $1/2 \times {\hbox {VDD}}$ to $3 \times {\hbox {VDD}}$ Bidirectional I/O Buffer With a Dynamic Gate Bias Generator-Reference-Cited by-同舟云学术

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A $1/2 \times {\hbox {VDD}}$ to $3 \times {\hbox {VDD}}$ Bidirectional I/O Buffer With a Dynamic Gate Bias Generator

Published:2010-07 Issue:7 Volume:57 Page:1642-1653
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Chua-Chin Wang ,Chia-Hao Hsu ,Yi-Cheng Liu

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8919/5512812/05373848.pdf?arnumber=5373848

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