Design Considerations of Multi-Level 1S1R Cell for In-Memory Computing
Author:
Affiliation:
1. School of Integrated Circuits, Peking University,Beijing,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10363774/10363775/10363785.pdf?arnumber=10363785
Reference7 articles.
1. Technology-Array-Algorithm Co-Optimization of RRAM for Storage and Neuromorphic Computing: Device Non-idealities and Thermal Cross-talk
2. Investigation of NbOx-based volatile switching device with self-rectifying characteristics
3. A New Insight and Modeling of Pulse-to-Pulse Variability in Analog Resistive Memory for On-Chip Training
4. A TaOx-Based RRAM with Improved Uniformity and Excellent Analog Characteristics by Local Dopant Engineering
5. Self-Selective Resistive Device With Hybrid Switching Mode for Passive Crossbar Memory Application
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