Itanium 2 processor 6M: higher frequency and larger L3 cache

Author:

Rusu S.,Muljono H.,Cherkauer B.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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4. Accurate and Simplified Prediction of L2 Cache Vulnerability for Cost-Efficient Soft Error Protection;IEICE Transactions on Information and Systems;2012

5. Energy-efficient cache design using variable-strength error-correcting codes;ACM SIGARCH Computer Architecture News;2011-06-22

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