Generation of Verified Programs for In-Memory Computing-Reference-Cited by-同舟云学术

Generation of Verified Programs for In-Memory Computing

Published:2022-08 Issue: Volume: Page:
ISSN:
Container-title:2022 25th Euromicro Conference on Digital System Design (DSD)
language:
Short-container-title:

Author:

Froehlich Saman¹,Drechsler Rolf¹

Affiliation:

1. University of Bremen,Group of Computer Architecture,Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9996588/9996595/09996874.pdf?arnumber=9996874

Reference23 articles.

1. The programmable logic-in-memory (plim) computer;gaillardon;Design Automation and Test in Europe,2016

2. Majority-inverter graph: A novel data-structure and algorithms for efficient logic optimization;amarú;2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC),0

3. CVC4

4. The complexity of theorem-proving procedures

5. ComPRIMe: A Compiler for Parallel and Scalable ReRAM-based In-Memory Computing

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09

2. Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

3. In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

4. Memristors: Device Modeling, Design and Verification;2023 IEEE International Symposium on Smart Electronic Systems (iSES);2023-12-18

5. Verification of In-Memory Logic Design using ReRAM Crossbars;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26