A 14-bit 1.8-V 20-mW 1-mm/sup 2/ CMOS DAC
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/4/20201/00933474.pdf?arnumber=933474
Cited by 39 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 10-bit 3.75-GS/s Binary-Weighted DAC with 58.6-pJ Energy Consumption in 65-nm CMOS;2020 IEEE Nordic Circuits and Systems Conference (NorCAS);2020-10-27
2. A Calibration Technique for Current Steering DACs - Self Calibration with Capacitor Storage;Communications in Computer and Information Science;2017
3. A $4\times 5$ -Gb/s 1.12- $\mu \text{s}$ Locking Time Reference-Less Receiver With Asynchronous Sampling-Based Frequency Acquisition and Clock Shared Subchannels;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2016-08
4. Extended statistical element selection;Proceedings of the 53rd Annual Design Automation Conference;2016-06-05
5. Continuous-Time Delta-Sigma Modulator;Analog Circuits and Signal Processing;2014
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