Funder
Spanish Ministry of Economics and Competitiveness
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
8 articles.
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1. Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-01
2. Kelvin Bridge Structure Based TSV Test for Weak Faults;2021 IEEE International Test Conference in Asia (ITC-Asia);2021-08-18
3. Fault Coexistence and Grading Aware TSV Test based on Delay Feature;International Journal of Circuits, Systems and Signal Processing;2021-07-19
4. Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-06
5. A Test Method for Large-size TSV Considering Resistive Open Fault and Leakage Fault Coexistence;2021 International Symposium on VLSI Design, Automation and Test (VLSI-DAT);2021-04-19