A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh-Reference-Cited by-同舟云学术

A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh

Published:2023-01 Issue:1 Volume:31 Page:114-127
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Jain Shubham¹^ORCID,Tsai Hsinyu²,Chen Ching-Tzu¹,Muralidhar Ramachandran¹^ORCID,Boybat Irem³^ORCID,Frank Martin M.¹^ORCID,Wozniak Stanislaw³^ORCID,Stanisavljevic Milos³,Adusumilli Praneet¹,Narayanan Pritish²^ORCID,Hosokawa Kohji⁴,Ishii Masatoshi⁴^ORCID,Kumar Arvind¹,Narayanan Vijay¹,Burr Geoffrey W.²^ORCID

Affiliation:

1. IBM T. J. Watson Research Center, Yorktown Heights, NY, USA

2. IBM Research–Almaden, San Jose, CA, USA

3. IBM Research Zurich, Rüschlikon, Switzerland

4. IBM Research, Tokyo, Japan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/9998453/09957094.pdf?arnumber=9957094

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