Time-Domain Multiply–Accumulate Unit-Reference-Cited by-同舟云学术

Time-Domain Multiply–Accumulate Unit

Published:2023-06 Issue:6 Volume:31 Page:762-775
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Locatelli Pedro Sartori¹^ORCID,Colombo Dalton Martini¹^ORCID,El-Sankary Kamal²^ORCID

Affiliation:

1. Graduate Program in Electrical Engineering, Universidade Federal de Minas Gerais, Belo Horizonte, Brazil

2. Department of Electrical and Computer Engineering, Dalhousie University, Halifax, NS, Canada

Funder

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES), Brazil

University Support Program for Integrated Circuit Design (APCI) from Brazilian Microelectronics Society

Fundação de Amparo à Pesquisa do Estado de Minas Gerais

Natural Sciences and Engineering Research Council of Canada

Canadian Microelectronics Corporation (CMC) Microsystems

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/10129243/10107445.pdf?arnumber=10107445

Reference38 articles.

1. Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs

2. Design of Analog and Digital Hybrid MAC Circuit for Artificial Neural Networks

3. A 2.6-to-4.1 GHz fractional-N digital PLL based on a time-mode arithmetic unit achieving ?249.4 dB FoM and ?59 dBc fractional spurs;gao;Proc IEEE Int Solid-State Circuits Conf (ISSCC),2022

4. Design of MAC unit for digital filters in signal processing and communication

5. Energy-Efficient Approximate MAC Unit

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1. An XOR-10T SRAM computing-in-memory macro with current MAC operations and time-to-digital conversion for BNN edge processors;AEU - International Journal of Electronics and Communications;2024-07

2. Efficiency Evaluation of Scalable Multiply and Accumulate Architectures in DSP: A Comparative Study of LUT Based and LUT-Less Based Approaches;2024 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE);2024-01-24

3. Sparse Matrix-Vector Multiplication Based on Online Arithmetic;IEEE Access;2024