Hollow Airgap Technology for CMOS Maximum Interconnect Capacitance Reduction-Reference-Cited by-同舟云学术

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Hollow Airgap Technology for CMOS Maximum Interconnect Capacitance Reduction

Published:2022-10-25 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)
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Author:

Prawoto Clarissa¹,Ma Zichao¹,Xiao Ying¹,Raju Salahuddin¹,Chan Mansun¹

Affiliation:

1. The Hong Kong University of Science and Technology,Department of Electronic and Computer Engineering,Kowloon,Hong Kong

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9962815/9963138/09963392.pdf?arnumber=9963392

Reference13 articles.

1. Metal-Organic Framework ZIF-8 Films As Low-κ Dielectrics in Microelectronics

2. Ultralow- $k$ Dielectric With Nanotubes Assisted Vertically Aligned Cylindrical Pores

3. Moisture Diffusion in Dense SiO2 and Ultra Low k Integrated Stacks

4. Air-Gap Technology With a Large Void-Fraction for Global Interconnect Delay Reduction

5. Interconnect Technology With h-BN-Capped Air-Gaps

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