Comprehensive Analysis and Optimization of Parasitic Capacitance on Conducted EMI and Switching Losses in Hybrid-Packaged SiC Power Modules
Author:
Affiliation:
1. School of Electrical and Electronic Engineering, Huazhong University of Science and Technology, Wuhan, China
2. Beijing Institute of Precision Mechatronics and Controls, Beijing, China
Funder
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/63/10261408/10225392.pdf?arnumber=10225392
Reference44 articles.
1. A Novel Hybrid Packaging Structure for High-Temperature SiC Power Modules
2. An Experimental Investigation of the Tradeoff between Switching Losses and EMI Generation With Hard-Switched All-Si, Si-SiC, and All-SiC Device Combinations
3. A High Power Density Double-side-end Double Sided Bonding SiC Half-bridge Power Module
4. High Voltage SiC Power Module Optimized for Low Parasitics and Compatible System Interface
5. Flexible PCB-Based 3-D Integrated SiC Half-Bridge Power Module With Three-Sided Cooling Using Ultralow Inductive Hybrid Packaging Structure
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1. Analytical Modeling and Comparison of EMI pre-filter Noise Emissions of Three-Phase Voltage and Current DC-Link Converters;IEEE Transactions on Power Electronics;2024-11
2. A Novel Double-Sided Cooling Silicon Carbide Power Module With Ultralow Parasitic Inductance Based on an Interleaved Power Loop;IEEE Transactions on Power Electronics;2024-10
3. Design and Integration Methodology of CM Stripline Inductors and EMI Filters in SiC Power Modules for Low Conductive CM EMI;2024 IEEE 10th International Power Electronics and Motion Control Conference (IPEMC2024-ECCE Asia);2024-05-17
4. EMI challenges in modern power electronic-based converters: recent advances and mitigation techniques;Frontiers in Electronics;2023-11-09
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