A 135fs<sub>rms</sub>-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier-Reference-Cited by-同舟云学术

A 135fs_rms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier

Published:2023-02-19 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Jo Yongwoo¹,Kim Juyeop¹,Shin Yuhwan¹,Hwang Chanwoong¹,Park Hangi¹,Choi Jaehyouk¹

Affiliation:

1. Korea Advanced Institute of Science and Technology,Daejeon,Korea

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10067248/10067251/10067748.pdf?arnumber=10067748

Reference6 articles.

1. An LTE-A Multimode Multiband RF Transceiver with 4RX/2TX Inter-Band Carrier Aggregation, 2-Carrier 4x4 MIMO with 256QAM and HPUE Capability in 28nm CMOS;tang;ISSCC,2019

2. 21.5 A 5G Sub-6GHz Zero-IF and mm-Wave IF Transceiver with MIMO and Carrier Aggregation

3. A 104fsrms-Jitter and -61 dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancelation Technique;kim;ISSCC,2021

4. A 65-nm CMOS 2x2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations;lim;IEEE JSSC,2018

5. 6.1 A Low-Power and Low-Cost 14nm FinFET RFIC Supporting Legacy Cellular and 5G FR1

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5. A 0.2-to-39.2GHz 66.2-fs Jitter and −71.3dBc Spur Sub-Sampling PLL Using DAC-Based Constant Control Voltage Compensator and Quad-Mode 2^nd Harmonic Filtering Oscillator;2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2024-06-16