A 4.25GHz-8.45GHz 67%-Chirp-Fractional-Bandwidth -121.5dBc/Hz-PN@1MHz 88fs-Jitter FMCW Synthesizer with Bandwidth-Boosting and Phase-Noise-Cancellation Techniques
Author:
Affiliation:
1. Hong Kong University of Science and Technology,China
2. The Chinese University of Hong Kong,Shenzhen,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10599936/10599927/10599999.pdf?arnumber=10599999
Reference5 articles.
1. A 16GHz, 41kHzrms Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL;Renukaswamy;ISSCC,2023
2. 32.5 A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope
3. A Self-Adapted Two-Point Modulation Type-II Digital PLL for Fast Chirp Rate and Wide Chirp-Bandwidth FMCW Signal Generation
4. 17.4 A 18.6-to-40.1GHz 201.7dBc/Hz FoMT Multi-Core Oscillator Using E-M Mixed-Coupling Resonance Boosting
5. A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier
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