An Area Efficient 1024-Point Low Power Radix-22 FFT Processor With Feed-Forward Multiple Delay Commutators
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/8453271/08357601.pdf?arnumber=8357601
Cited by 23 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Research on High-Performance Fourier Transform Algorithms Based on the NPU;Applied Sciences;2024-01-01
2. Optimized 4-Parallel 1024-Point MSC FFT;IEEE Access;2024
3. Design of High-Speed Pipelined 1024Point Radix-2ˆ2 Fft Using Modified Input Scheduling Algorithm;2023 IEEE 20th India Council International Conference (INDICON);2023-12-14
4. Fully Parallel and Reconfigurable Realization of DFT/IDFT using In-Memory Computing;2023 10th International Conference on Wireless Networks and Mobile Communications (WINCOM);2023-10-26
5. A Streaming Data Processing Architecture Based on Lookup Tables;Electronics;2023-06-19
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