Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM-Reference-Cited by-同舟云学术

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Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM

Published:2014-12 Issue:12 Volume:61 Page:3376-3385
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Na Taehui,Kim Jisu,Kim Jung Pill,Kang Seung H.,Jung Seong-Ook

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/6964837/06853380.pdf?arnumber=6853380

Cited by 40 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Timing Optimization Model and PVT Tracked Scheme for STT-MRAM Voltage-Mode Sense;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09

2. A Novel Group-Division-Multiplexing Complementary Symmetric Reference Sensing Scheme for MRAM;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09

3. Variation Aware Evaluation Approach and Design Methodology for SOT-MRAM;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04

4. Fault-Aware ECC Scheme for Enhancing the Read Reliability of STT-MRAMs;2023 IEEE International Test Conference in Asia (ITC-Asia);2023-09-12

5. MRAM-Based Cache System Design and Policy Optimization for RISC-V Multi-Core CPUs;IEEE Transactions on Magnetics;2023-06

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