A 12-bit 8.47-fJ/Conversion-Step Capacitor-Swapping SAR ADC in 110-nm CMOS

Author:

Chung Yung-Hui,Wu Meng-Hsuan,Li Hung-Sung

Funder

National Science Council Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 35 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. CoMN: Algorithm-Hardware Co-Design Platform for Nonvolatile Memory-Based Convolutional Neural Network Accelerators;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-07

2. A 105-dB SFDR 16-bit SAR ADC with a Window Capacitor Calibration Scheme;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. Predictive LSB-First Successive Approximation for SAR Analog-to-Digital Converters;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06

4. An Energy-Efficient SAR ADC With a Coarse-Fine Bypass Window Technique;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01

5. A 13-Bit 1-MS/s SAR ADC With Completion-Aware Background Capacitor Mismatch Calibration;IEEE Access;2023

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