A 10-Bit 200-kS/s 1.76-$\mu$ W SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications
Author:
Funder
National Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/8691851/08666173.pdf?arnumber=8666173
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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2. A 9-10-Bit Adjustable and Energy-Efficient Switching Scheme for Successive Approximation Register Analog-to-Digital Converter with One Least Significant Bit Common-Mode Voltage Variation;Sensors;2024-05-21
3. A TDC-assisted SAR ADC with high-speed sampling switches and fine-tuned delay cells;Microelectronics Journal;2024-05
4. A 0.5 V 10-bit SAR ADC with offset calibrated time-domain comparator;AEU - International Journal of Electronics and Communications;2024-05
5. A 0.4-to-0.8 V 0.1-to-5 MS/s 10 b two-step SAR ADC with TDC-based fine quantizer in 40-nm CMOS;Microelectronics Journal;2023-11
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