Gate length scaling beyond Si: Mono-layer 2D Channel FETs Robust to Short Channel Effects-Reference-Cited by-同舟云学术

Gate length scaling beyond Si: Mono-layer 2D Channel FETs Robust to Short Channel Effects

Published:2022-12-03 Issue: Volume: Page:
ISSN:
Container-title:2022 International Electron Devices Meeting (IEDM)
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Author:

Dorow C. J.¹,Penumatcha A.¹,Kitamura A.¹,Rogan C.¹,O'Brien K. P.¹,Lee S.¹,Ramamurthy R.²,Cheng C. -Y.³,Maxey K.¹,Zhong T.¹,Tronic T.¹,Holybee B.¹,Richards J.²,Oni A.²,Lin C. -C.¹,Naylor C. H.¹,Arefin N.⁴,Metz M.¹,Bristol R.¹,Clendenning S. B.¹,Avci U.¹

Affiliation:

1. Components Research,Intel Corporation,Hillsboro,OR,USA.,97214

2. Quality and Reliability,Intel Corporation,Hillsboro,OR,USA.,97214

3. Technology Development,Intel Corporation,Hillsboro,OR,USA.,97214

4. Global Sourcing for Equipment and Materials,Intel Corporation,Hillsboro,OR,USA,97214

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10019319/10019320/10019524.pdf?arnumber=10019524

Reference16 articles.

1. Sub-10 nm Nanopattern Architecture for 2D Material Field-Effect Transistors

2. MoS2 Field-Effect Transistor with Sub-10 nm Channel Length

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