A 48 fJ/CS, 74 dB SNDR, 87 dB SFDR, 85 dB THD, 30 MS/s pipelined ADC using hybrid dynamic amplifier-Reference-Cited by-同舟云学术

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A 48 fJ/CS, 74 dB SNDR, 87 dB SFDR, 85 dB THD, 30 MS/s pipelined ADC using hybrid dynamic amplifier

Published:2014-06 Issue: Volume: Page:
ISSN:
Container-title:2014 Symposium on VLSI Circuits Digest of Technical Papers
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Author:

Venkatram Hariprasath,Oh Taehwan,Sobue Kazuki,Hamashita Koichi,Moon Un-Ku

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6850260/6858353/06858373.pdf?arnumber=6858373

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Thermal Noise Analysis of Ring Amplifier in Cyclic Analog-to-Digital Converter;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2023-05-01

2. A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping;IEEE Journal of Solid-State Circuits;2021-03

3. A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-09

4. Operational Transconductance Amplifier With Class-B Slew-Rate Boosting for Fast High-Performance Switched-Capacitor Circuits;IEEE Transactions on Circuits and Systems I: Regular Papers;2018-11

5. A Replica-Amp Gain Enhancement Technique for an Operational Amplifier with Low Mismatch Sensitivity and High Voltage Swing;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2016

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