A Replica-Amp Gain Enhancement Technique for an Operational Amplifier with Low Mismatch Sensitivity and High Voltage Swing
Author:
Affiliation:
1. Corporate Research and Development Center, Toshiba Corporation
2. Faculty of Science and Technology, Tokyo University of Science
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing
Link
https://www.jstage.jst.go.jp/article/transfun/E99.A/2/E99.A_547/_pdf
Reference8 articles.
1. [1] K. Nagaraj, T. Viswanathan, K. Singhal, and J. Vlach, “Switched-capacitor circuits with reduced sensitivity to amplifier gain,” IEEE Trans. Circuits Syst., vol.34, no.5, pp.571-574, May 1987.
2. [2] B.R. Gregoire and U.-K. Moon, “An over-60dB true rail-to-rail performance using correlated level shifting and an Opamp with only 30dB loop gain,” IEEE J. Solid-State Circuits, vol.43, no.12, pp.2620-2630, Dec. 2008.
3. [3] P.C. Yu and H.-S. Lee, “A high-swing 2-V CMOS operational amplifier with replica-amp gain enhancement,” IEEE J. Solid-State Circuits, vol.28, no.12, pp.1265-1272, Dec. 1993.
4. [4] H. Venkatram, B. Hershberg, T. Oh, M. Gande, K. Sobue, K. Hamashita, and U.-K. Moon, “Parallel gain enhancement technique for switched-capacitor circuits,” Proc. IEEE 2013 Custom Integrated Circuits Conference, pp.1-4, 2013.
5. [5] H. Venkatram, T. Oh, K. Sobue, K. Hamashita, and U.-K. Moon, “A 48fJ/CS, 74dB SNDR, 87dB SFDR, 85dB THD, 30MS/s pipelined ADC using hybrid dynamic amplifier,” 2014 Symposium on VLSI Circuits Digest of Technical Papers, pp.1-2, 2014.
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