A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation-Reference-Cited by-同舟云学术

A Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation

Published:2023 Issue: Volume:11 Page:16812-16819
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Garzón Esteban¹^ORCID,Yavits Leonid²^ORCID,Finocchio Giovanni³^ORCID,Carpentieri Mario⁴^ORCID,Teman Adam²^ORCID,Lanuzza Marco¹^ORCID

Affiliation:

1. Department of Computer Engineering, Modeling, Electronics and Systems, University of Calabria (UNICAL), Rende, Italy

2. Emerging Nanoscaled Integrated Circuits and Systems (EnICS) Labs, Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel

3. Department of Mathematical and Computer Sciences, Physical Sciences and Earth Sciences, University of Messina, Messina, Italy

4. Department of Electrical and Information Engineering, Politecnico di Bari, Bari, Italy

Funder

Italian Ministry of University and Research

European Union’s Horizon Europe Programme for Research and Innovation

Lise Meitner Grants for Israeli-Swedish Research Collaboration

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/10005208/10045679.pdf?arnumber=10045679

Reference35 articles.

1. Sparse Matrix Multiplication On An Associative Processor

2. DMTJ-based non-volatile ternary content addressable memory for energy-efficient high-performance systems;vicu na;Proc IEEE 13th Latin Amer Symp Circuits Syst (LASCAS),2022

3. BioSEAL

4. Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

5. Resistive Associative Processor

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