A CNRZ-7 Based Wireline Transceiver With High-Bandwidth-Density, Low-Power for D2D Communication

Author:

Zhang Geng1ORCID,Lai Mingche1,Lyu Fangxu1,Zheng Xuqiang2ORCID,Wang Heming3,Lv Dongbin3,Xu Chaolong1,Qi Xingyun1,Liu Qing3

Affiliation:

1. School of Computer, National University of Defense Technology, Changsha, China

2. Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China

3. School of Air and Missile Defense College, Air Force Engineering University, Xi’an, China

Funder

China Postdoctoral Science Special Foundation through the Project ‘‘Key Technologies of 224 Gbps CNRZ-7 Transceiver Oriented to Core Interconnect’’

China Postdoctoral Science Foundation through the Project ‘‘Research on Key Technologies of High Speed SerDes Chip for 10E Supercomputer IO’’

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Reference24 articles.

1. A 256 Gb/s/mm-shoreline AIB-compatible 16 nm FinFET CMOS chiplet for 2.5 D integration with stratix 10 FPGA on EMIB and tiling on silicon interposer;liu;Proc CICC,2021

2. A 7-nm 4-GHz Arm¹-Core-Based CoWoS¹ Chiplet Design for High-Performance Computing

3. A 1.02 pJ/b 417 Gb/s/mm USR link in 16 nm FinFET;tajalli;Proc Symp VLSI Circuits,2019

4. Chord Signaling for High-Speed Data Movement: Employing Advanced Communication and Circuit Techniques to Augment Data-Transfer Bandwidth

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