Design and analysis of FPGA based 32 bit ALU using reversible gates

Author:

Swamynathan S. M.,Banumathi V.

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Comparative Energy & Hardware Analysis on Implementation of 8-Bit ALU Using Different FPGAs Families;2023 6th International Conference on Contemporary Computing and Informatics (IC3I);2023-09-14

2. Design and Verification of Ethernet Protocol;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06

3. Design and Implementation of ALU Using Ring Counters;2023 International Conference on Signal Processing, Computation, Electronics, Power and Telecommunication (IConSCEPT);2023-05-25

4. Optimized Arithmetic and Logical Unit Design using Reversible Logic Gates;2023 2nd International Conference on Applied Artificial Intelligence and Computing (ICAAIC);2023-05-04

5. Design of one bit processor using logic gates;PROCEEDINGS OF THE 1ST INTERNATIONAL CONFERENCE ON FRONTIER OF DIGITAL TECHNOLOGY TOWARDS A SUSTAINABLE SOCIETY;2023

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