Design of 32-Function- 32-Bit Arithmetic and Logical Unit (ALU)-Reference-Cited by-同舟云学术

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Design of 32-Function- 32-Bit Arithmetic and Logical Unit (ALU)

Published:2024-04-05 Issue: Volume:11 Page:1-5
ISSN:
Container-title:2024 IEEE 9th International Conference for Convergence in Technology (I2CT)
language:
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Author:

I Mamatha¹,R Raksha²,P Dinesh²

Affiliation:

1. Mangalore Institute of Technology & Engineering,Department of Electronics and Communication Engineering,Badaga Mijar, Moodbidri,Karnataka,India,574225

2. Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of Electrical and Electronics Engineering,Bengaluru,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10543249/10543223/10543825.pdf?arnumber=10543825

Reference11 articles.

1. Design and Implementation of 1553B Bus Controller on FPGA

2. Design and Implementation of a high speed 4bit ALU using BASYS3 FPGA Board

3. An efficient way of implementing high speed 4-Bit advanced multipliers in FPGA

4. Energy efficient design and implementation of ALU on 40nm FPGA

5. Clock gating based energy efficient ALU design and implementation on FPGA

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