Energy efficient design and implementation of ALU on 40nm FPGA
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6525155/6533346/06533355.pdf?arnumber=6533355
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design of 32-Function- 32-Bit Arithmetic and Logical Unit (ALU);2024 IEEE 9th International Conference for Convergence in Technology (I2CT);2024-04-05
2. Design Space Exploration for High-Speed Implementation of the MISTY1 Block Cipher;Mathematical Problems in Engineering;2021-06-16
3. FPGA-Based Power Optimized CAM Design Using LVCMOS18 and High-Speed Low Voltage Digitally Controlled Impedance;Advances in Intelligent Systems and Computing;2021
4. Role of Scaling of Frequency and Toggle Rate in POD IO Standards Based Energy Efficient ALU Design on Ultra Scale FPGA;INT CONF COMPUT INTE;2018
5. Frequency Scaling Based Green Mobile Battery Charge Controller Sensor Design on FPGA;Advanced Materials Research;2014-07
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