5.85-mW 3.1–23.7-GHz Two-Stage CMOS VGA With 2.53-dB NF Using Concurrent Current Steering
Author:
Affiliation:
1. Department of Electronic Engineering, National Changhua University of Education, Changhua, Taiwan
2. Department of Electrical Engineering, National Chi Nan University, Puli, Taiwan
Funder
Ministry of Science and Technology (MOST), Taiwan
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics
Link
http://xplorestaging.ieee.org/ielx7/7260/9941011/09834267.pdf?arnumber=9834267
Reference18 articles.
1. A K-Band 5G Phased Array RX Channel With 3.3-dB NF and 28.5-dB Gain in 130-nm SiGe
2. Design of Wideband LNA Employing Cascaded Complimentary Common Gate and Common Source Stages
3. A 7.2–27.3 GHz CMOS LNA With 3.51 ±0.21 dB Noise Figure Using Multistage Noise Matching Technique
4. A Tri (K/Ka/V)-Band Monolithic CMOS Low Noise Amplifier with Shared Signal Path and Variable Gains
5. A $Ka$ -Band Variable-Gain Amplifier With Low OP1dB Variation for 5G Applications
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