Radiation Hardness Evaluations of a Stacked Flip Flop in a 22 nm FD-SOI Process by Heavy-Ion Irradiation-Reference-Cited by-同舟云学术

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Radiation Hardness Evaluations of a Stacked Flip Flop in a 22 nm FD-SOI Process by Heavy-Ion Irradiation

Published:2023-07-03 Issue: Volume: Page:
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Container-title:2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS)
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Author:

Sugitani Shotaro¹,Nakajima Ryuichi¹,Ito Takafumi¹,Furuta Jun¹,Kobayashi Kazutoshi¹,Louvat Mathieu²,Jacquet Francois²,Eloy Jean-Christophe²,Montfort Olivier²,Jure Lionel²,Huard Vincent²

Affiliation:

1. Kyoto Institute of Technology,Dept. of Electronics,Japan

2. Dolphin Design,France

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10224820/10224858/10224879.pdf?arnumber=10224879

Reference19 articles.

1. Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI process

2. Estimation of the Single-Event Upset Sensitivity of Advanced SOI SRAMs

3. Impact of Combinational Logic Delay for Single Event Upset on Flip Flops in a 65 nm FDSOI Process

4. Process Dependence of Soft Errors Induced by Alpha Particles, Heavy Ions, and High Energy Neutrons on Flip Flops in FDSOI

5. FDSOI process/design full solutions for ultra low leakage, high speed and low voltage SRAMs;ranica;2013 Symposium on VLSI Circuits VLSIC,2013

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