A compact 105–130 GHz push-push doubler, with 4dBm Psat and 18% efficiency in 28nm CMOS
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7331896/7345038/07345078.pdf?arnumber=7345078
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 5.5 dBm 125–140 GHz ×6 Frequency Multiplier Operating With -27 dBm Input Power in 28-nm CMOS;IEEE Microwave and Wireless Technology Letters;2024-07
2. A 4.5 dBm SiGe Doubler-Amplifier Chain Covering the Entire D-Band;2024 IEEE 24th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF);2024-01-21
3. A D-Band Frequency Doubler with Gm-Boosting Technique in 28-nm CMOS;2023 18th European Microwave Integrated Circuits Conference (EuMIC);2023-09-18
4. A 120-GHz Class-F Frequency Doubler With 7.8-dBm POUT in 55-nm Bulk CMOS;IEEE Journal of Solid-State Circuits;2023-08
5. A 208–233-GHz Frequency Doubler With 1.1% Power-Added Efficiency in 28-nm CMOS;IEEE Microwave and Wireless Components Letters;2022-11
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