An 11GHz 8-core Series Resonance CMOS VCO with Scalable Ring-coupling Scheme Achieving Phase Noise of -136.8dBc/Hz at 1 MHz Offset
Author:
Affiliation:
1. BNRist, Tsinghua University,School of Integrated Circuits,China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10599936/10599927/10599996.pdf?arnumber=10599996
Reference5 articles.
1. Analysis and Design of a Multi-Core Oscillator for Ultra-Low Phase Noise
2. A 27-GHz Quad-Core CMOS Oscillator With No Mode Ambiguity
3. On the Remarkable Performance of the Series-Resonance CMOS Oscillator
4. Series-Resonance BiCMOS VCO with Phase Noise of -138dBc/Hz at 1MHz Offset from 10GHz and -190dBc/Hz FoM
5. A 100 MHz-Reference, 10.3-to-11.1 GHz Quadrature PLL with 33.7-fsrms Jitter and -83.9 dBc Reference Spur Level using a -130.8 dBc/Hz Phase Noise at 1MHz offset Folded Series-Resonance VCO in 65nm CMOS
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