Series-Resonance BiCMOS VCO with Phase Noise of -138dBc/Hz at 1MHz Offset from 10GHz and -190dBc/Hz FoM
Author:
Affiliation:
1. University of Pavia,Pavia,Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731738.pdf?arnumber=9731738
Reference7 articles.
1. A quad-core 15GHz BiCMOS VCO with −124dBc/Hz phase noise at 1MHz offset, −189dBc/Hz FOM, and robust to multimode concurrent oscillations
2. Insights into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation Links;lotti;IEEE JSSC,2017
3. HMC512 Data Sheet;V06 0114,0
4. A 10.7–14.1GHz Reconfigurable Octacore DCO with -126 dBc/Hz Phase Noise at 1MHz offset in 28 nm CMOS;tomasin;IEEE RFIC,2021
5. On the Remarkable Performance of the Series-Resonance CMOS Oscillator
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1. A Multireference PLL: Theory and Implementation;IEEE Journal of Solid-State Circuits;2024-07
2. An 11GHz 8-core Series Resonance CMOS VCO with Scalable Ring-coupling Scheme Achieving Phase Noise of -136.8dBc/Hz at 1 MHz Offset;2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2024-06-16
3. A 6.3–7.6 GHz VCO Achieving 192.7 dBc/Hz FoM With Dual Common-Mode Resonances;IEEE Microwave and Wireless Technology Letters;2024-06
4. A Transformer-Based Series-Resonance CMOS VCO;IEEE Journal of Solid-State Circuits;2024
5. Component-Related Phase Noise Evaluation Method for the LC Oscillators;Circuits, Systems, and Signal Processing;2023-08-09
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