Author:
Abella Jaume,Bulla Calvin,Cabo Guillem,Cazorla Francisco J.,Cristal Adrian,Doblas Max,Figueras Roger,Gonzalez Alberto,Hernandez Carles,Hernandez Cesar,Jimenez Victor,Kosmidis Leonidas,Kostalabros Vatistas,Langarita Ruben,Leyva Neiel,Lopez-Paradis Guillem,Marimon Joan,Martinez Ricardo,Mendoza Jonnatan,Moll Francesc,Moreto Miquel,Pavon Julian,Ramirez Cristobal,Ramirez Marco A.,Rojas Carlos,Rubio Antonio,Ruiz Abraham,Sonmez Nehir,Soria Victor,Teres Lluis,Unsal Osman,Valero Mateo,Vargas Ivan,Villa Luis,Ramirez Cristobal
Funder
Instituto Politécnico Nacional
Cited by
8 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Implementation of Hardware Trace Buffer Module for RISC-V Processor Core;2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES);2024-06-27
2. RISC-V for Genome Data Analysis: Opportunities and Challenges;2023 38th Conference on Design of Circuits and Integrated Systems (DCIS);2023-11-15
3. Overview of the modern SoC design technologies and open softprocessor architectures;2023 13th International Conference on Dependable Systems, Services and Technologies (DESSERT);2023-10-13
4. RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32;2023 IEEE Seventh Ecuador Technical Chapters Meeting (ECTM);2023-10-10
5. DVINO: A RISC-V Vector Processor Implemented in 65nm Technology;2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS);2022-11-16