1 GHz HAL SPARC64/sup R/ Dual Floating Point Unit with RAS features

Author:

Naini A.,Dhablania A.,James W.,Das Sarma D.

Publisher

IEEE Comput. Soc

Cited by 26 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Radix-64 Floating-Point Division and Square Root: Iterative and Pipelined Units;IEEE Transactions on Computers;2023-10

2. Newton-Raphson Integer Division for Area-Constrained Microcontrollers;2023 IEEE 30th Symposium on Computer Arithmetic (ARITH);2023-09-04

3. Error Analysis for Fused Floating-point Square-root and Division based on Goldschmidt Algorithm;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26

4. Enhanced Floating-Point Adder with Full Denormal Support;2022 IEEE 29th Symposium on Computer Arithmetic (ARITH);2022-09

5. Low-Latency and High-Bandwidth Pipelined Radix-64 Division and Square Root Unit;2022 IEEE 29th Symposium on Computer Arithmetic (ARITH);2022-09

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