On Attacking IJTAG Architecture based on Locking SIB with Security LFSR
Author:
Affiliation:
1. Indian Institute of Technology,Dept. of EE,Jammu,India
2. Indian Institute of Technology,Dept. of CSE,Jammu,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9897157/9897171/09897172.pdf?arnumber=9897172
Reference20 articles.
1. A Secure Test Wrapper Design Against Internal and Boundary Scan Attacks for Embedded Cores
2. Securing Designs against Scan-Based Side-Channel Attacks
3. Preventing scan-based sidechannel attacks through key masking;ahlawat;2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),2017
4. Securing Scan through Plain-text Restriction
5. Preventing Scan Attack through Test Response Encryption
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. On Protecting IJTAG using an Inherently Secure SIB;2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC);2023-10-16
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