Impact of Process Variations on Flip-Flops Energy and Timing Characteristics
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5570021/5571793/05572742.pdf?arnumber=5572742
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. High-Speed and Low-Energy Dual-Mode Logic based Single-Clack-Cycle Binary Comparator;2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS);2021-02-21
2. Impacts of Process Variations and Aging on Lifetime Reliability of Flip-Flops: A Comparative Analysis;IEEE Transactions on Device and Materials Reliability;2019-09
3. Design Methodology for Variation Tolerant D-Flip-Flop Using Regression Analysis;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2018-12-01
4. Metastability immune and area efficient error masking flip-flop for timing error resilient designs;Integration;2018-03
5. A variation-aware simulation framework for hybrid CMOS/spintronic circuits;2017 IEEE International Symposium on Circuits and Systems (ISCAS);2017-05
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