A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems-Reference-Cited by-同舟云学术

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A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems

Published:2019-07 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
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Author:

Gordon-Ross Ann,Abdel-Hafeez Saleh,Hammam Alsafrjalni Mohamad

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8826391/8839309/08839315.pdf?arnumber=8839315

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Review on the Usage of Synchronous and Asynchronous FIFOs in Digital Systems Design;Engineering;2024

2. Research on Time-Anchored Law Enforcement Video Correlation Technology;2022 6th International Symposium on Computer Science and Intelligent Control (ISCSIC);2022-11

3. Development of a general purpose First-In-First-Out (FIFO) core;i-manager's Journal on Circuits and Systems;2022

4. Real time Method based on SVM for Depth-of-‎Interaction Identification in PET Scanners;Arab Journal of Nuclear Sciences and Applications;2021-12-24

5. Reconfigurable FIFO memory circuit for synchronous and asynchronous communication;International Journal of Circuit Theory and Applications;2021-01-12

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