Low-Power Convolutional Neural Network Accelerator on FPGA-Reference-Cited by-同舟云学术

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Low-Power Convolutional Neural Network Accelerator on FPGA

Published:2023-06-11 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)
language:
Short-container-title:

Author:

Khalil Kasem¹,Kumar Ashok²,Bayoumi Magdy³

Affiliation:

1. University of Mississippi,Department of Electrical and Computer Engineering,Mississippi,USA

2. University of Louisiana at Lafayette,The Center for Advanced Computer Studies,LA,USA

3. University of Louisiana at Lafayette,Department of Electrical and Computer Engineering,LA,USA

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10168547/10168548/10168646.pdf?arnumber=10168646

Reference25 articles.

1. Recent advances in convolutional neural network acceleration

2. Reconfigurable Hardware Design Approach for Economic Neural Network

3. Energy-Efficient Deep CNN for Smoke Detection in Foggy IoT Environment

4. An Efficient Approach for Neural Network Architecture

5. High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Survey on Neural Network Hardware Accelerators;IEEE Transactions on Artificial Intelligence;2024-08

2. Exploring Memory Access Techniques for Efficient FPGA based 3D CNN Accelerator Design;2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS);2024-04-22

3. Implementation of FPGA-based Accelerator for Convolutional Neural Networks;International Journal of Research In Science & Engineering;2024-04-01

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