Architecture based performance evaluation of IIR digital filters for DSP applications
Author:
Bujjibabu P.,Sravani N.
Cited by
3 articles.
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1. Systolic Digital IIR Filter Architectures for Real Time Signal Processing Applications;2024 5th International Conference for Emerging Technology (INCET);2024-05-24
2. Design and Simulation of a Tunable 14-Bit IIR Digital Low-Pass Filter Based on FPGA;2022 International Conference on Advanced Enterprise Information System (AEIS);2022-12
3. Design and Implementation of an Efficient IIR Filter Architecture Using Merged Delay Transformation;Proceedings of Sixth International Congress on Information and Communication Technology;2021-09-10