A Self-Aliglned 1-/spl mu/m-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy-Reference-Cited by-同舟云学术

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A Self-Aliglned 1-/spl mu/m-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy

Published:1985-02 Issue:1 Volume:20 Page:123-129
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Yuan Taur ,Hu G.J.,Dennard R.H.,Terman L.M.,Chung-Yu Ting ,Petrillo K.E.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/22600/01052284.pdf?arnumber=1052284

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Contact resistance dependent scaling-down behavior of amorphous InGaZnO thin-film transistors;Current Applied Physics;2011-07

2. Implantation Induced Defects in the Retrograde Well with a Buried Layer;Journal of The Electrochemical Society;2002

3. Damage formation during 1.0 MeV Si self-implantation at low temperatures;Journal of Electronic Materials;1999-04

4. Damage formation in Si(100) induced by MeV self-ion implantation;Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms;1993-09

5. Damage saturation during high‐energy ion implantation of Si1−xGex;Applied Physics Letters;1992-12-28

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