Author:
Elhuni H.,Vergis A.,Kinney L.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
47 articles.
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1. Highly efficient test architecture for low power AI accelerators;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021
2. C-Testing and Efficient Fault Localization for AI Accelerators*;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021
3. Test Architecture for Systolic Array of Edge-Based AI Accelerator;IEEE Access;2021
4. Reliable test architecture with test cost reduction for systolic based DNN accelerators;IEEE Transactions on Circuits and Systems II: Express Briefs;2021
5. Combined pseudo-exhaustive and deterministic testing of array multipliers;2018 IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR);2018-05