Triple patterning aware detailed placement toward zero cross-row middle-of-line conflict
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7367889/7372533/07372597.pdf?arnumber=7372597
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Practical Mixed-Cell-Height Legalization Considering Vertical Cell Abutment Constraint;Proceedings of the 2024 International Symposium on Physical Design;2024-03-12
2. Selective Use of Stitch-Induced Via for V0 Mask Reduction: Standard Cell Design and Placement Optimization;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2019-12-01
3. Enhanced Optimal Multi-Row Detailed Placement for Neighbor Diffusion Effect Mitigation in Sub-10 nm VLSI;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2019-09
4. Triple Patterning Aware Detailed Placement Toward Zero Cross-Row Middle-of-Line Conflict;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2017-07
5. Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes;Proceedings of the 54th Annual Design Automation Conference 2017;2017-06-18
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