Material and integration challenges for large scale Si quantum computing
Author:
Affiliation:
1. CEA Leti
2. CNRS Néel Institute
3. CEA-IRIG, Université Grenoble Alpes,Grenoble,France
Funder
European Research Council
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9720433/9720494/09720708.pdf?arnumber=9720708
Reference17 articles.
1. Formation of strain-induced quantum dots in gated semiconductor nanostructures
2. Experimental Study of Gate-First FinFET Threshold-Voltage Mismatch
3. Qubit Device Integration Using Advanced Semiconductor Manufacturing Process Technology
4. Challenges and perspectives in the modeling of spin qubits
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1. Leveraging off-the-shelf silicon chips for quantum computing;Applied Physics Letters;2024-06-24
2. Transport characterization of CMOS-based devices fabricated with isotopically-enriched 28Si for spin qubit applications;ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC);2023-09-11
3. RF simulation platform of qubit control using FDSOI technology for quantum computing;Solid-State Electronics;2023-01
4. Spin Qubits in Silicon FinFET Devices;2022 International Electron Devices Meeting (IEDM);2022-12-03
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