Analysis and Modeling of Vth Shift in 4H-SiC MOSFETs at Room and Cryogenic-Temperature
Author:
Affiliation:
1. University of Padova,Department of Information Engineering,Padova,Italy,35131
2. Onsemi,Oudenaarde,Belgium,B-9700
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9764406/9764408/09764558.pdf?arnumber=9764558
Reference18 articles.
1. Physical Modeling of Charge Trapping in 4H-SiC DMOSFET Technologies
2. Interfaces between 4H-SiC and SiO2: Microstructure, nanochemistry, and near-interface traps
3. Differential Variable Base Charge Pumping ($\Delta-\text{CP}$) for SiO2/SiC Interface Characterization
4. Si/SiO2 and SiC/SiO2 Interfaces for MOSFETs – Challenges and Advances
5. Shallow Traps at P-Doped SiO2/4H-SiC(0001) Interface
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Trapping/Detrapping Kinetic Modeling Under Positive/Negative Gate Stress Including Inhibition Dynamics in 4H-SiC MOS Capacitors;IEEE Transactions on Electron Devices;2024-01
2. Cryogenic Ultra-Fast Bias Temperature Instability Trap Profiling of SiC MOSFETs;2022 IEEE 34th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2022-05-22
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