SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling-Reference-Cited by-同舟云学术

SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling

Published:2023-02 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
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Author:

Wi Minbok¹,Park Jaehyun¹,Ko Seoyoung¹,Kim Michael Jaemin¹,Sung Kim Nam²,Lee Eojin³,Ahn Jung Ho¹

Affiliation:

1. Seoul National University

2. University of Illinois at Urbana-Champaign

3. Inha University

Funder

National Research Foundation of Korea

Publisher

IEEE

Link

Reference99 articles.

1. 16Gb DDR5 SDRAM Addendum,2021

2. Calculating Memory Power for DDR4 SDRAM,2017

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5. Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM Chips;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2024-06-24